--- e1000phy.c.orig 2007-11-25 00:18:44.000000000 +0900 +++ e1000phy.c 2007-11-25 00:23:10.000000000 +0900 @@ -30,7 +30,7 @@ */ #include -__FBSDID("$FreeBSD: src/sys/dev/mii/e1000phy.c,v 1.14.2.1 2006/08/08 04:37:18 yongari Exp $"); +__FBSDID("$FreeBSD: src/sys/dev/mii/e1000phy.c,v 1.18 2006/12/11 11:09:48 yongari Exp $"); /* * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY. @@ -50,7 +50,6 @@ #include #include -#include #include #include @@ -63,8 +62,13 @@ #include "miibus_if.h" -static int e1000phy_probe(device_t); -static int e1000phy_attach(device_t); +static int e1000phy_probe(device_t); +static int e1000phy_attach(device_t); + +struct e1000phy_softc { + struct mii_softc mii_sc; + int mii_model; +}; static device_method_t e1000phy_methods[] = { /* device interface */ @@ -77,46 +81,78 @@ static devclass_t e1000phy_devclass; static driver_t e1000phy_driver = { - "e1000phy", e1000phy_methods, sizeof (struct mii_softc) + "e1000phy", + e1000phy_methods, + sizeof(struct e1000phy_softc) }; + DRIVER_MODULE(e1000phy, miibus, e1000phy_driver, e1000phy_devclass, 0, 0); static int e1000phy_service(struct mii_softc *, struct mii_data *, int); static void e1000phy_status(struct mii_softc *); static void e1000phy_reset(struct mii_softc *); -static int e1000phy_mii_phy_auto(struct mii_softc *); +static int e1000phy_mii_phy_auto(struct e1000phy_softc *); +static int mii_phy_dev_probe(device_t dev, const struct mii_phydesc *mpd, int mrv); -static int e1000phy_debug = 0; + +#define MII_PHY_DESC(a, b) { MII_OUI_ ## a, MII_MODEL_ ## a ## _ ## b, \ + MII_STR_ ## a ## _ ## b } +#define MII_PHY_END { 0, 0, NULL } + + +static const struct mii_phydesc e1000phys[] = { + MII_PHY_DESC(MARVELL, E1000), + MII_PHY_DESC(MARVELL, E1011), + MII_PHY_DESC(MARVELL, E1000_3), + MII_PHY_DESC(MARVELL, E1000S), + MII_PHY_DESC(MARVELL, E1000_5), + MII_PHY_DESC(MARVELL, E1000_6), + MII_PHY_DESC(MARVELL, E3082), + MII_PHY_DESC(MARVELL, E1112), + MII_PHY_DESC(MARVELL, E1149), + MII_PHY_DESC(MARVELL, E1111), + MII_PHY_DESC(MARVELL, E1116), + MII_PHY_DESC(MARVELL, E1118), + MII_PHY_DESC(xxMARVELL, E1000), + MII_PHY_DESC(xxMARVELL, E1011), + MII_PHY_DESC(xxMARVELL, E1000_3), + MII_PHY_DESC(xxMARVELL, E1000_5), + MII_PHY_DESC(xxMARVELL, E1111), + MII_PHY_END +}; static int -e1000phy_probe(device_t dev) +mii_phy_dev_probe(device_t dev, const struct mii_phydesc *mpd, int mrv) { - struct mii_attach_args *ma; - u_int32_t id; - ma = device_get_ivars(dev); - id = ((ma->mii_id1 << 16) | ma->mii_id2) & E1000_ID_MASK; - if (id != E1000_ID_88E1000 - && id != E1000_ID_88E1000S - && id != E1000_ID_88E1011) { - return ENXIO; + mpd = mii_phy_match(device_get_ivars(dev), mpd); + if (mpd != NULL) { + device_set_desc(dev, mpd->mpd_name); + return (mrv); } - device_set_desc(dev, MII_STR_MARVELL_E1000); - return BUS_PROBE_DEFAULT; + return (ENXIO); +} + + +static int +e1000phy_probe(device_t dev) +{ + + return (mii_phy_dev_probe(dev, e1000phys, BUS_PROBE_DEFAULT)); } static int e1000phy_attach(device_t dev) { + struct e1000phy_softc *esc; struct mii_softc *sc; struct mii_attach_args *ma; struct mii_data *mii; - u_int32_t id; - - getenv_int("e1000phy_debug", &e1000phy_debug); + int fast_ether; - sc = device_get_softc(dev); + esc = device_get_softc(dev); + sc = &esc->mii_sc; ma = device_get_ivars(dev); sc->mii_dev = device_get_parent(dev); mii = device_get_softc(sc->mii_dev); @@ -126,23 +162,32 @@ sc->mii_phy = ma->mii_phyno; sc->mii_service = e1000phy_service; sc->mii_pdata = mii; - sc->mii_flags |= MIIF_NOISOLATE; - - id = ((ma->mii_id1 << 16) | ma->mii_id2) & E1000_ID_MASK; - if (id == E1000_ID_88E1011 - && (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK)) - sc->mii_flags |= MIIF_HAVEFIBER; + sc->mii_anegticks = MII_ANEGTICKS_GIGE; mii->mii_instance++; + + fast_ether = 0; + esc->mii_model = MII_MODEL(ma->mii_id2); + switch (esc->mii_model) { + case MII_MODEL_MARVELL_E1011: + case MII_MODEL_MARVELL_E1112: + if (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK) + sc->mii_flags |= MIIF_HAVEFIBER; + break; + case MII_MODEL_MARVELL_E3082: + /* 88E3082 10/100 Fast Ethernet PHY. */ + sc->mii_anegticks = MII_ANEGTICKS; + fast_ether = 1; + break; + } + e1000phy_reset(sc); device_printf(dev, " "); #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) + ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), + E1000_CR_ISOLATE); if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { -#if 0 - ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), - E1000_CR_ISOLATE); -#endif ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), E1000_CR_SPEED_10); printf("10baseT, "); @@ -155,15 +200,19 @@ ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst), E1000_CR_SPEED_100 | E1000_CR_FULL_DUPLEX); printf("100baseTX-FDX, "); - /* - * 1000BT-simplex not supported; driver must ignore this entry, - * but it must be present in order to manually set full-duplex. - */ - ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, sc->mii_inst), - E1000_CR_SPEED_1000); - ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, sc->mii_inst), - E1000_CR_SPEED_1000 | E1000_CR_FULL_DUPLEX); - printf("1000baseTX-FDX, "); + if (fast_ether == 0) { + /* + * 1000BT-simplex not supported; driver must ignore + * this entry, but it must be present in order to + * manually set full-duplex. + */ + ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, + sc->mii_inst), E1000_CR_SPEED_1000); + ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, + sc->mii_inst), + E1000_CR_SPEED_1000 | E1000_CR_FULL_DUPLEX); + printf("1000baseTX-FDX, "); + } } else { ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, sc->mii_inst), E1000_CR_SPEED_1000 | E1000_CR_FULL_DUPLEX); @@ -174,52 +223,91 @@ #undef ADD MIIBUS_MEDIAINIT(sc->mii_dev); - return(0); + return (0); } static void e1000phy_reset(struct mii_softc *sc) { - u_int32_t reg; - int i; + struct e1000phy_softc *esc; + uint16_t reg; - /* initialize custom E1000 registers to magic values */ + esc = (struct e1000phy_softc *)sc; reg = PHY_READ(sc, E1000_SCR); - reg &= ~E1000_SCR_AUTO_X_MODE; - PHY_WRITE(sc, E1000_SCR, reg); - - /* normal PHY reset */ - /*mii_phy_reset(sc);*/ - reg = PHY_READ(sc, E1000_CR); - reg |= E1000_CR_RESET; - PHY_WRITE(sc, E1000_CR, reg); - - for (i = 0; i < 500; i++) { - DELAY(1); - reg = PHY_READ(sc, E1000_CR); - if (!(reg & E1000_CR_RESET)) + if ((sc->mii_flags & MIIF_HAVEFIBER) != 0) { + reg &= ~E1000_SCR_AUTO_X_MODE; + PHY_WRITE(sc, E1000_SCR, reg); + if (esc->mii_model == MII_MODEL_MARVELL_E1112) { + /* Select 1000BASE-X only mode. */ + PHY_WRITE(sc, E1000_EADR, 2); + reg = PHY_READ(sc, E1000_SCR); + reg &= ~E1000_SCR_MODE_MASK; + reg |= E1000_SCR_MODE_1000BX; + PHY_WRITE(sc, E1000_SCR, reg); + PHY_WRITE(sc, E1000_EADR, 1); + } + } else { + switch (esc->mii_model) { + case MII_MODEL_MARVELL_E1111: + case MII_MODEL_MARVELL_E1112: + case MII_MODEL_MARVELL_E1116: + case MII_MODEL_MARVELL_E1118: + case MII_MODEL_MARVELL_E1149: + /* Disable energy detect mode. */ + reg &= ~E1000_SCR_EN_DETECT_MASK; + reg |= E1000_SCR_AUTO_X_MODE; + if (esc->mii_model == MII_MODEL_MARVELL_E1116) + reg &= ~E1000_SCR_POWER_DOWN; + break; + case MII_MODEL_MARVELL_E3082: + reg |= (E1000_SCR_AUTO_X_MODE >> 1); + break; + default: + reg &= ~E1000_SCR_AUTO_X_MODE; break; + } + /* Enable CRS on TX. */ + reg |= E1000_SCR_ASSERT_CRS_ON_TX; + /* Auto correction for reversed cable polarity. */ + reg &= ~E1000_SCR_POLARITY_REVERSAL; + PHY_WRITE(sc, E1000_SCR, reg); + + if (esc->mii_model == MII_MODEL_MARVELL_E1116) { + PHY_WRITE(sc, E1000_EADR, 2); + reg = PHY_READ(sc, E1000_SCR); + reg |= E1000_SCR_RGMII_POWER_UP; + PHY_WRITE(sc, E1000_SCR, reg); + PHY_WRITE(sc, E1000_EADR, 0); + } } - /* set more custom E1000 registers to magic values */ - reg = PHY_READ(sc, E1000_SCR); - reg |= E1000_SCR_ASSERT_CRS_ON_TX; - PHY_WRITE(sc, E1000_SCR, reg); + switch (MII_MODEL(esc->mii_model)) { + case MII_MODEL_MARVELL_E3082: + case MII_MODEL_MARVELL_E1112: + case MII_MODEL_MARVELL_E1116: + case MII_MODEL_MARVELL_E1118: + case MII_MODEL_MARVELL_E1149: + break; + default: + /* Force TX_CLK to 25MHz clock. */ + reg = PHY_READ(sc, E1000_ESCR); + reg |= E1000_ESCR_TX_CLK_25; + PHY_WRITE(sc, E1000_ESCR, reg); + break; + } - reg = PHY_READ(sc, E1000_ESCR); - reg |= E1000_ESCR_TX_CLK_25; - PHY_WRITE(sc, E1000_ESCR, reg); - - /* even more magic to reset DSP? */ - PHY_WRITE(sc, 29, 0x1d); - PHY_WRITE(sc, 30, 0xc1); - PHY_WRITE(sc, 30, 0x00); + /* Reset the PHY so all changes take effect. */ + reg = PHY_READ(sc, E1000_CR); + reg |= E1000_CR_RESET; + PHY_WRITE(sc, E1000_CR, reg); } static int e1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) { struct ifmedia_entry *ife = mii->mii_media.ifm_cur; + struct e1000phy_softc *esc = (struct e1000phy_softc *)sc; + uint16_t speed, gig; int reg; switch (cmd) { @@ -245,71 +333,81 @@ /* * If the interface is not up, don't do anything. */ - if ((mii->mii_ifp->if_flags & IFF_UP) == 0) { + if ((mii->mii_ifp->if_flags & IFF_UP) == 0) break; - } - switch (IFM_SUBTYPE(ife->ifm_media)) { - case IFM_AUTO: - e1000phy_reset(sc); - (void)e1000phy_mii_phy_auto(sc); + if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { + e1000phy_mii_phy_auto(esc); break; + } + speed = 0; + switch (IFM_SUBTYPE(ife->ifm_media)) { case IFM_1000_T: - e1000phy_reset(sc); - - /* TODO - any other way to force 1000BT? */ - (void)e1000phy_mii_phy_auto(sc); + if (esc->mii_model == MII_MODEL_MARVELL_E3082) + return (EINVAL); + speed = E1000_CR_SPEED_1000; break; - case IFM_1000_SX: - e1000phy_reset(sc); - - PHY_WRITE(sc, E1000_CR, - E1000_CR_FULL_DUPLEX | E1000_CR_SPEED_1000); - PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD); + if (esc->mii_model == MII_MODEL_MARVELL_E3082) + return (EINVAL); + speed = E1000_CR_SPEED_1000; break; - case IFM_100_TX: - e1000phy_reset(sc); - - if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { - PHY_WRITE(sc, E1000_CR, - E1000_CR_FULL_DUPLEX | E1000_CR_SPEED_100); - PHY_WRITE(sc, E1000_AR, E1000_AR_100TX_FD); - } else { - PHY_WRITE(sc, E1000_CR, E1000_CR_SPEED_100); - PHY_WRITE(sc, E1000_AR, E1000_AR_100TX); - } + speed = E1000_CR_SPEED_100; break; - case IFM_10_T: - e1000phy_reset(sc); - - if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) { - PHY_WRITE(sc, E1000_CR, - E1000_CR_FULL_DUPLEX | E1000_CR_SPEED_10); - PHY_WRITE(sc, E1000_AR, E1000_AR_10T_FD); - } else { - PHY_WRITE(sc, E1000_CR, E1000_CR_SPEED_10); - PHY_WRITE(sc, E1000_AR, E1000_AR_10T); - } - + speed = E1000_CR_SPEED_10; break; - + case IFM_NONE: + reg = PHY_READ(sc, E1000_CR); + PHY_WRITE(sc, E1000_CR, + reg | E1000_CR_ISOLATE | E1000_CR_POWER_DOWN); + goto done; default: return (EINVAL); } - break; + if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) { + speed |= E1000_CR_FULL_DUPLEX; + gig = E1000_1GCR_1000T_FD; + } else + gig = E1000_1GCR_1000T; + + reg = PHY_READ(sc, E1000_CR); + reg &= ~E1000_CR_AUTO_NEG_ENABLE; + PHY_WRITE(sc, E1000_CR, reg | E1000_CR_RESET); + /* + * When setting the link manually, one side must + * be the master and the other the slave. However + * ifmedia doesn't give us a good way to specify + * this, so we fake it by using one of the LINK + * flags. If LINK0 is set, we program the PHY to + * be a master, otherwise it's a slave. + */ + if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T || + (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_SX)) { + if ((mii->mii_ifp->if_flags & IFF_LINK0)) + PHY_WRITE(sc, E1000_1GCR, gig | + E1000_1GCR_MS_ENABLE | E1000_1GCR_MS_VALUE); + else + PHY_WRITE(sc, E1000_1GCR, gig | + E1000_1GCR_MS_ENABLE); + } else { + if (esc->mii_model != MII_MODEL_MARVELL_E3082) + PHY_WRITE(sc, E1000_1GCR, 0); + } + PHY_WRITE(sc, E1000_AR, E1000_AR_SELECTOR_FIELD); + PHY_WRITE(sc, E1000_CR, speed | E1000_CR_RESET); +done: + break; case MII_TICK: /* * If we're not currently selected, just return. */ - if (IFM_INST(ife->ifm_media) != sc->mii_inst) { + if (IFM_INST(ife->ifm_media) != sc->mii_inst) return (0); - } /* * Is the interface even up? @@ -328,19 +426,19 @@ * Read the status register twice; BMSR_LINK is latch-low. */ reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); - if (reg & BMSR_LINK) + if (reg & BMSR_LINK) { + sc->mii_ticks = 0; break; + } - /* - * Only retry autonegotiation every 5 seconds. - */ - if (++sc->mii_ticks <= 5) - break; + /* Announce link loss right after it happens. */ + if (sc->mii_ticks <= sc->mii_anegticks) + return (0); sc->mii_ticks = 0; e1000phy_reset(sc); - e1000phy_mii_phy_auto(sc); - return (0); + e1000phy_mii_phy_auto(esc); + break; } /* Update the media status. */ @@ -355,7 +453,7 @@ e1000phy_status(struct mii_softc *sc) { struct mii_data *mii = sc->mii_pdata; - int bmsr, bmcr, esr, ssr, isr, ar, lpar; + int bmsr, bmcr, esr, gsr, ssr, isr, ar, lpar; mii->mii_media_status = IFM_AVALID; mii->mii_media_active = IFM_ETHER; @@ -374,8 +472,10 @@ if (bmcr & E1000_CR_LOOPBACK) mii->mii_media_active |= IFM_LOOP; - if ((!(bmsr & E1000_SR_AUTO_NEG_COMPLETE) || !(ssr & E1000_SSR_LINK) || - !(ssr & E1000_SSR_SPD_DPLX_RESOLVED))) { + if ((((bmcr & E1000_CR_AUTO_NEG_ENABLE) != 0) && + ((bmsr & E1000_SR_AUTO_NEG_COMPLETE) == 0)) || + ((ssr & E1000_SSR_LINK) == 0) || + ((ssr & E1000_SSR_SPD_DPLX_RESOLVED) == 0)) { /* Erg, still trying, I guess... */ mii->mii_media_active |= IFM_NONE; return; @@ -410,20 +510,35 @@ mii->mii_media_active |= IFM_FLAG0; } } + + /* FLAG2 : local PHY resolved to MASTER */ + if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) || + (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_SX)) { + PHY_READ(sc, E1000_1GSR); + gsr = PHY_READ(sc, E1000_1GSR); + if ((gsr & E1000_1GSR_MS_CONFIG_RES) != 0) + mii->mii_media_active |= IFM_FLAG2; + } } static int -e1000phy_mii_phy_auto(struct mii_softc *mii) +e1000phy_mii_phy_auto(struct e1000phy_softc *esc) { + struct mii_softc *sc; - if ((mii->mii_flags & MIIF_HAVEFIBER) == 0) { - PHY_WRITE(mii, E1000_AR, E1000_AR_10T | E1000_AR_10T_FD | - E1000_AR_100TX | E1000_AR_100TX_FD | + sc = &esc->mii_sc; + if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) + PHY_WRITE(sc, E1000_AR, E1000_AR_10T | E1000_AR_10T_FD | + E1000_AR_100TX | E1000_AR_100TX_FD | E1000_AR_PAUSE | E1000_AR_ASM_DIR); - PHY_WRITE(mii, E1000_1GCR, E1000_1GCR_1000T_FD); - PHY_WRITE(mii, E1000_CR, - E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG); - } + else + PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD | E1000_FA_1000X | + E1000_FA_SYM_PAUSE | E1000_FA_ASYM_PAUSE); + if (esc->mii_model != MII_MODEL_MARVELL_E3082) + PHY_WRITE(sc, E1000_1GCR, + E1000_1GCR_1000T_FD | E1000_1GCR_1000T); + PHY_WRITE(sc, E1000_CR, + E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG); return (EJUSTRETURN); } --- e1000phyreg.h.orig 2007-11-25 00:18:59.000000000 +0900 +++ e1000phyreg.h 2007-11-25 00:23:10.000000000 +0900 @@ -1,4 +1,4 @@ -/* $FreeBSD: src/sys/dev/mii/e1000phyreg.h,v 1.3 2005/01/06 01:42:56 imp Exp $ */ +/* $FreeBSD: src/sys/dev/mii/e1000phyreg.h,v 1.4 2006/12/11 10:43:32 yongari Exp $ */ /*- * Principal Author: Parag Patel * Copyright (c) 2001 @@ -236,6 +236,19 @@ #define E1000_SCR_TX_FIFO_DEPTH_10 0x8000 #define E1000_SCR_TX_FIFO_DEPTH_12 0xC000 +#define E1000_SCR_EN_DETECT_MASK 0x0300 + +/* 88E1112 page 2 */ +#define E1000_SCR_MODE_MASK 0x0380 +#define E1000_SCR_MODE_AUTO 0x0180 +#define E1000_SCR_MODE_COPPER 0x0280 +#define E1000_SCR_MODE_1000BX 0x0380 + +/* 88E1116 page 0 */ +#define E1000_SCR_POWER_DOWN 0x0004 +/* 88E1116 page 2 */ +#define E1000_SCR_RGMII_POWER_UP 0x0008 + #define E1000_SSR 0x11 /* special status register */ #define E1000_SSR_JABBER 0x0001 #define E1000_SSR_REV_POLARITY 0x0002 @@ -286,6 +299,8 @@ #define E1000_RECR 0x15 /* RX error counter reg */ +#define E1000_EADR 0x16 /* extended address reg */ + #define E1000_LCR 0x18 /* LED control reg */ #define E1000_LCR_LED_TX 0x0001 #define E1000_LCR_LED_RX 0x0002 --- miidevs.orig 2007-11-25 00:19:20.000000000 +0900 +++ miidevs 2007-11-25 00:22:10.000000000 +0900 @@ -1,4 +1,4 @@ -$FreeBSD: src/sys/dev/mii/miidevs,v 1.30.2.4 2006/10/21 00:25:38 yongari Exp $ +$FreeBSD: src/sys/dev/mii/miidevs,v 1.37 2006/12/11 10:42:04 yongari Exp $ /*$NetBSD: miidevs,v 1.6 1999/05/14 11:37:30 drochner Exp $*/ /*- @@ -189,4 +189,18 @@ /* Marvell Semiconductor PHYs */ model MARVELL E1000 0x0000 Marvell 88E1000 Gigabit PHY model MARVELL E1011 0x0002 Marvell 88E1011 Gigabit PHY +model MARVELL E1000_3 0x0003 Marvell 88E1000 Gigabit PHY +model MARVELL E1000S 0x0004 Marvell 88E1000S Gigabit PHY +model MARVELL E1000_5 0x0005 Marvell 88E1000 Gigabit PHY +model MARVELL E1000_6 0x0006 Marvell 88E1000 Gigabit PHY +model MARVELL E3082 0x0008 Marvell 88E3082 10/100 Fast Ethernet PHY +model MARVELL E1112 0x0009 Marvell 88E1112 Gigabit PHY +model MARVELL E1149 0x000b Marvell 88E1149 Gigabit PHY +model MARVELL E1111 0x000c Marvell 88E1111 Gigabit PHY +model MARVELL E1116 0x0021 Marvell 88E1116 Gigabit PHY +model MARVELL E1118 0x0022 Marvell 88E1118 Gigabit PHY model xxMARVELL E1000 0x0005 Marvell 88E1000 Gigabit PHY +model xxMARVELL E1011 0x0002 Marvell 88E1011 Gigabit PHY +model xxMARVELL E1000_3 0x0003 Marvell 88E1000 Gigabit PHY +model xxMARVELL E1000_5 0x0005 Marvell 88E1000 Gigabit PHY +model xxMARVELL E1111 0x000c Marvell 88E1111 Gigabit PHY